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14-FEB-2017 to 16-FEB-2017:
APEX EXPO - ASTER Technologies are exhibiting at the APEX EXPO in San Diego between February 14th - 16th, 2017. So why not visit booth 3844 during the show, when we can discuss your requirements and demonstrate the many features of our analysis tools. (San Diego, USA)
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08-NOV-2016 to 11-NOV-2016:
ASTER announces the first system level PCB viewer integrated with National Instruments TestStand.
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07-MAR-2016:
March 2016 - Newsletter n.14: Visit ASTER at IPC APEX EXPO 2016 Show in Las Vegas
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TestWay news 2015
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IEEE AUTOTESTCON - Visit ASTER at the IEEE AutoTestCon, Booth 431. Information & registration. Press release (National Harbor, USE)
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Nepcon CHINA - Vist ASTER during NEPCON exibition on Booth B-1J14 (Shanghai, China)
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24-FEB-2015 to 26-FEB-2015:
IPC APEX EXPO - ASTER Technologies are exhibiting at APEX Expo between February 24th - 26th, 2015, Booth 415. So why not visit the booth during the show, when we can discuss your requirements and demonstrate the many features of our analysis tools. (San Diego, USA)
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11-NOV-2014 to 14-NOV-2014:
Electronica - ASTER Technologies are exhibiting at Electronica.
So why not visit the booth A1 352 when we can discuss your requirements and demonstrate our DfX & test coverage analysis tools. Read more …with our press release. (Munich, Germany)
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Nepcon CHINA - Vist ASTER during NEPCON exibition on Booth A1-1E85 (Shanghai, China)
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IPC APEX EXPO - Booth 607 (Las vegas, USA)
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DebugPlus™ - Schematic viewer

Schematic Viewer

DebugPlus is a simple to use software module with effective and powerful schematic display and search capabilities designed to reduce both time and cost associated with test debug, associated documentation, and subsequent program maintenance and repair. Using full Windows capabilities including the DDE data exchange, DebugPlus may be used either standalone or combined with another member of the QUAD family: RepairPlus for layout and FaultView for fault tickets.

DebugPlus

Technical description:

  • Fast schematic display.
  • Search of components, nets, pins or nails with automatic zoom on the right element.
  • Insertion and positioning of test channel numbers or node names.
  • Print capability for schematic sheets including nail information.
  • Digitalizing function for component and pin location where no CAD reference data is available.
  • Possibility to have interaction between schematic, Fault tickets and layout (option).
  • DDE interface for communication with external applications.
  • Multilingual user interface (English, French, German)
  • Designed for Microsoft Windows (Windows 9x, Me, NT4, NT2000, XP)

Cost savings

DebugPlus generates cost savings within several areas of the engineering, test and repair process which together provide significant overall savings:
  • Reduces the time taken to create documentation including the "marked-up" schematic.
  • Reduces debug time through faster component, net, pin, and testpoint location and analysis.
  • Reduces time spent during the administration and update of schematic documents.
  • Provides fast and easy access to the schematic during repair and by service engineers.

In addition, DebugPlus provides the platform for the generation of error free and consistent documentation related to ISO9000.

Additional information



 
     
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