A selection of our customers:

ASTER's satisfied customers


Latest news:

25-APR-2017 to 27-APR-2017:
Nepcon CHINA - Vist ASTER during NEPCON exibition on Booth 1N14 (Shanghai, China)
%%10
NEPCON-China-2017-Show-Logo

separator
14-FEB-2017 to 16-FEB-2017:
APEX EXPO - ASTER Technologies are exhibiting at the APEX EXPO in San Diego between February 14th - 16th, 2017. So why not visit booth 3844 during the show, when we can discuss your requirements and demonstrate the many features of our analysis tools. (San Diego, USA)
%%10
en-apex2017

separator
08-NOV-2016 to 11-NOV-2016:
ASTER announces the first system level PCB viewer integrated with National Instruments TestStand.
So why not visit the booth A1 352 when we can discuss your requirements and demonstrate our DfX & test coverage analysis tools.
%%10
en-electronica2016

separator
12-SEP-2016 to 15-SEP-2016:
Autotestcon - ASTER Technologies are exhibiting at Autotestcon on booth 1004 (Anaheim, USA)
%%10
autotestcon2016

separator
26-APR-2016 to 28-APR-2016:
Nepcon CHINA - Vist ASTER during NEPCON exibition on Booth 1N17 (Shanghai, China)
%%10
NEPCON-China-2016-Show-Logo

separator
15-MAR-2016 to 17-MAR-2016:
IPC APEX EXPO - Pleasevisit us at booth 1651 (Las vegas, USA)
%%10
en-apex2016

separator
07-MAR-2016:
March 2016 - Newsletter n.14: Visit ASTER at IPC APEX EXPO 2016 Show in Las Vegas
separator
21-OCT-2015:
TestWay news 2015
separator
21-OCT-2015:
November 2015 - Newsletter n.12: Visit ASTER at the AUTOTESTCON 2015 Show in Maryland, USA
separator
10-NOV-2015 to 13-NOV-2015:
Productronica - Visit ASTER at Productronoca, Hall A1, Booth 232. Information & registration (Munich, Germany)
%%10
en-productronica2015

separator
03-NOV-2015 to 05-NOV-2015:
IEEE AUTOTESTCON - Visit ASTER at the IEEE AutoTestCon, Booth 431. Information & registration. Press release (National Harbor, USE)
%%10
autotestcon

separator
21-APR-2015 to 23-APR-2015:
Nepcon CHINA - Vist ASTER during NEPCON exibition on Booth B-1J14 (Shanghai, China)
%%10
2015nel

separator
24-FEB-2015 to 26-FEB-2015:
IPC APEX EXPO - ASTER Technologies are exhibiting at APEX Expo between February 24th - 26th, 2015, Booth 415. So why not visit the booth during the show, when we can discuss your requirements and demonstrate the many features of our analysis tools. (San Diego, USA)
%%10
apex

separator
11-NOV-2014 to 14-NOV-2014:
Electronica - ASTER Technologies are exhibiting at Electronica.
So why not visit the booth A1 352 when we can discuss your requirements and demonstrate our DfX & test coverage analysis tools. Read more …with our press release. (Munich, Germany)
%%10
en-electronica2014

separator
23-APR-2014 to 25-APR-2014:
Nepcon CHINA - Vist ASTER during NEPCON exibition on Booth A1-1E85 (Shanghai, China)
%%10
2014nel

separator
25-MAR-2014 to 27-MAR-2014:
IPC APEX EXPO - Booth 607 (Las vegas, USA)
%%10
apex2014

separator
>> More...
  Products   Services   Events   Company
Contact us   ASTER Worldwide locations Worldwide locations
Choose your
language:
English version  Version française
 

TestWay™ - Custom Rules

Adapt the TestWay™ testability analyzer to your design and manufacturing processes using custom rules. While TestWay includes a large number of built-in rules, some users desire to add their own rules (design, DfT, testability). Perhaps some custom ASIC requires special design rules, or perhaps the manufacturing process imposes some constraints. Maybe there are some design guidelines intended to improve quality or reduce manufacturing costs. All major electronics manufacturers have distinctive practices. Some differences are historical, others are clearly aimed at gaining competitive advantage. TestWay custom rules permit users to confirm that their distinctive practices are being followed correclty.

Your own requirements in order to check:

  • Pin or device oriented rules.
  • Technological requirements (Design rules).
  • In-Circuit programming for flash EEPROM or FPGA.
  • Specific rules for ASIC.
  • Any customer's rules!
You never have the same problem twice as TestWay capitalizes your knowledge through the customer’s rules.

Simple, natural language

Unlike other approaches which the C language or SQL database queries, TestWay uses simple natural language to describe new rules. Wild card characters (? and *) simplify the process even further by allowing many devices or pins to be covered by one rule.

Examples

    ! Design and EMC rules
    Pin (IN&DIGITAL) is not floating.
    Pin (NC) is connected to GROUND.

    ! DfT - PLD and FPGA testability
    Pin ISPEN* of device (ISPLSI) is connected to a pull-up.
    Pin PWRDWN? (IN) of device XC30?? is accessible.
    Pin M0 (IN) of device XC30?? is accessible.
    Pin M1 (IN) of device XC30?? is accessible.
    Pin M2 (IN) of device XC30?? is accessible.

    ! DfT - Check In-circuit programming of EEPROMs
    Pin A9 of device AM27C010 is protected by a device (DIODE).
    Pin CE_ of device AM27C010 is accessible.
    Pin OE_ of device AM27C010 is accessible.
    Pin PGM_ of device AM27C010 is accessible.
    Pin VPP of device AM27C010 is protected by a device (DIODE).
    Pin VCC of device AM27C010 is protected by a device (DIODE).
    Pin A9 of device AM29F040 is protected by a device (RESISTOR).

    ! DfT - Check specific requirements of ASICs
    Pin TNI of device PASS (ASIC) is connected to a pull-up.
    Pin TRST of device (ASIC) is connected to a pull-down.
    


 
     
Home | News & Events | Products | Services | Contact us | Terms of use | Privacy policy © 1993-2017 Aster All Rights Reserved.
Aster - Solutions Provider for PCB Test, improving your yields from design to production.